Voice Synthesizer

The project aims to obtain a pure sound wave output from the speaker after converting two short sound files with the wav file extension into a processable data type by various methods.

Essentially, sound files containing the meaning of the words "zero" and "one" were activated by two buttons assigned to them.

The main element planned to be used to achieve this is the Spartan 3E Starter FPGA Card. The Digital Analog Converter module is embedded in this card and it supports the SPI communication protocol while transmitting data between this module and the FPGA. Therefore, SPI communication based data flow is provided in this project.

First of all, the audio files to be subjected to data processing were recorded. Since the lost file was a file with a .mp4 extension, the audio files were converted to a .wav file extension. This stage is carried out to convert each "bit" of the audio files into a format that can be understood and processed by the FPGA.

The "bits" of the resulting audio files were converted from 16 bit resolution and signed format to the data type that the digital-to-analog converter can process, that is, 12 bit resolution and unsigned format, with the help of FPGA.

The "bits" converted into the data format that the Digital Analog Converter can process were written into units called BRAM (Block Ram) in the FPGA. This process was repeated for both audio files.

Two buttons were defined to act as "toggle" in order to transmit the resulting data stack consisting of a series of "1" and "0" to the speaker via the DAC. "Debouncer" blocks were used to prevent these buttons from causing confusion. Thus, the buttons "one" and "zero" were appointed as the initiating elements of the process of transmitting meaningful sound files to the speaker and outputting them at a frequency that can be heard by the human ear.

see also:

debouncer: In projects with Push-button or Switch applications, due to the nature of buttons and switches, the rubbing of two conductive metals against each other occurs very quickly and repeatedly during the on-off state. This results in the processor trying to perform the operation many times in a row.

Thus, either the program does not work correctly and unpredictable (absurd) results occur. To avoid this, software precautions are taken and system stability is not impaired.